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LTC3704 Wide Input Range, No RSENSETM Positive-to-Negative DC/DC Controller
FEATURES
s s s
DESCRIPTIO
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s s s s
s
High Efficiency Operation (No Sense Resistor Required) Wide Input Voltage Range: 2.5V to 36V Current Mode Control Provides Excellent Transient Response High Maximum Duty Cycle (Typ 92%) 1% Internal Voltage Reference 2% RUN Pin Threshold with 100mV Hysteresis Micropower Shutdown: IQ = 10A Programmable Switching Frequency (50kHz to 1MHz) with One External Resistor Synchronizable to an External Clock Up to 1.3 x fOSC User-Controlled Pulse Skip or Burst Mode(R) Operation Internal 5.2V Low Dropout Voltage Regulator Capable of Operating with a Sense Resistor for High Output Voltage Applications (VDS >36V) Small 10-Lead MSOP Package
The LTC(R)3704 is a wide input range, current mode, positive-to-negative DC/DC controller that drives an N-channel power MOSFET and requires very few external components. Intended for low to high power applications, it eliminates the need for a current sense resistor by utilizing the power MOSFET's on-resistance, thereby maximizing efficiency. The IC's operating frequency can be set with an external resistor over a 50kHz to 1MHz range, and can be synchronized to an external clock using the MODE/SYNC pin. Burst Mode operation at light loads, a low minimum operating supply voltage of 2.5V and a low shutdown quiescent current of 10A make the LTC3704 ideally suited for battery-operated systems. For applications requiring constant frequency operation, the Burst Mode operation feature can be defeated using the MODE/SYNC pin. Higher than 36V switch voltage applications are possible with the LTC3704 by connecting the SENSE pin to a resistor in the source of the power MOSFET. The LTC3704 is available in the 10-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. No RSENSE is a trademark of Linear Technology Corporation.
APPLICATIO S
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SLIC Power Supplies Telecom Power Supplies Portable Electronic Equipment Cable and DSL Modems Router Supplies
TYPICAL APPLICATIO
R1 1M 1 2 RUN ITH LTC3704 RC 3k 3 4 5 CC1 4.7nF RT 80.6k 1% RFB1 1.21k 1% RFB2 3.65k 1% NFB FREQ MODE/SYNC INTVCC GATE GND SENSE VIN
*
L1* 10 9 CDC 47F
VIN 5V to 15V VOUT -5.0V 3A to 5A L2*
*
EFFICIENCY (%)
8 7 6 D1 CVCC 4.7F CIN 47F M1
COUT 100F (X2)
GND
3704 TA01
CIN, CDC : TDK C5750X5R1C476M COUT: TDK C5750X5R0J107M CVCC: TAIYO YUDEN LMK316BJ475ML
D1: MBRD835L (ON SEMICONDUCTOR) L1, L2: BH ELECTRONICS BH510-1009 M1: Si4884 (SILICONIX/VISHAY)
Figure 1. High Efficiency Positive to Negative Supply
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Conversion Efficiency
100 90 80 70 60 VIN = 10V 50 40 30 20 0.001 0.01 1.0 0.1 OUTPUT CURRENT (A) 10
3704 TA01b
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VIN = 5V VIN = 15V
1
LTC3704
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
ORDER PART NUMBER
TOP VIEW RUN ITH NFB FREQ MODE/ SYNC 1 2 3 4 5 10 9 8 7 6 SENSE VIN INTVCC GATE GND
VIN Voltage ............................................... - 0.3V to 36V INTVCC Voltage ........................................... - 0.3V to 7V INTVCC Output Current ........................................ 50mA GATE Voltage ........................... - 0.3V to VINTVCC + 0.3V ITH Voltage ............................................... - 0.3V to 2.7V NFB Voltage .............................................. -2.7V to 2.7V RUN, MODE/SYNC Voltages ....................... - 0.3V to 7V FREQ Voltage ............................................- 0.3V to 1.5V SENSE Pin Voltage ................................... - 0.3V to 36V Operating Temperature Range (Note 2) .. - 40C to 85C Junction Temperature (Note 3) ............................ 125C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C
LTC3704EMS
MS PACKAGE 10-LEAD PLASTIC MSOP
MS PART MARKING LTYT
TJMAX = 125C, JA = 120C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VINTVCC = 5V, VRUN = 1.5V, RT = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL VIN(MIN) IQ PARAMETER Minimum Input Voltage Input Voltage Supply Current Continuous Mode Burst Mode Operation, No Load Shutdown Mode Rising RUN Input Threshold Voltage Falling RUN Input Threshold Voltage
q
CONDITIONS
MIN 2.5
TYP
MAX
UNITS V
Main Control Loop (Note 4) VMODE/SYNC = 5V, VITH = 0.75V VMODE/SYNC = 0V, VITH = 0.2V (Note 5) VRUN = 0V 1.223 1.198 50 VITH = 0.2V (Note 5)
q
550 250 10 1.348 1.248 100 1 -1.218 -1.212 -1.230 7.5 0.002
q
1000 500 20 1.273 1.298 150 100 -1.242 -1.248 15 0.02
VRUN+ VRUN- VRUN(HYST) IRUN VNFB INFB VNFB VIN VNFB VITH gm VITH(BURST) ISENSE(ON) ISENSE(OFF)
RUN Pin Input Threshold Hysteresis RUN Input Current Negative Feedback Voltage NFB Pin Input Current Line Regulation Load Regulation Error Amplifier Transconductance Burst Mode Operation ITH Pin Voltage SENSE Pin Current (GATE High) SENSE Pin Current (GATE Low)
VITH = 0.2V (Note 5) 2.5V VIN 30V VMODE/SYNC = 0V, VTH = 0.5V to 0.90V (Note 5) ITH Pin Load = 5A (Note 5) Falling ITH Voltage (Note 5) Duty Cycle < 20% VSENSE = 0V VSENSE = 30V 120 -1
- 0.1 650 0.3 150 40 0.1 180 75 5
VSENSE(MAX) Maximum Current Sense Input Threshold
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A A A V V V mV nA V V A %/V % mho V mV A A
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LTC3704
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = VINTVCC = 5V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL Oscillator fOSC DMAX fSYNC/fOSC tSYNC(MIN) tSYNC(MAX) VIL(MODE) VIH(MODE) RMODE/SYNC VFREQ VINTVCC VINTVCC VIN1 VINTVCC VIN2 VLDO(LOAD) VDROPOUT IINTVCC GATE Driver tr tf GATE Driver Output Rise Time GATE Driver Output Fall Time CL = 3300pF (Note 7) CL = 3300pF (Note 7) 17 8 100 100 ns ns Oscillator Frequency Oscillator Frequency Range Maximum Duty Cycle Recommended Maximum Synchronized Frequency Ratio MODE/SYNC Minimum Input Pulse Width MODE/SYNC Maximum Input Pulse Width Low Level MODE/SYNC Input Voltage High Level MODE/SYNC Input Voltage MODE/SYNC Input Pull-Down Resistance Nominal FREQ Pin Voltage INTVCC Regulator Output Voltage INTVCC Regulator Line Regulation INTVCC Regulator Line Regulation INTVCC Load Regulation INTVCC Regulator Dropout Voltage Bootstrap Mode INTVCC Supply Current in Shutdown VIN = 7.5V 7.5V VIN 15V 15V VIN 30V 0 IINTVCC 20mA VIN = 5V, INTVCC Load = 20mA RUN = 0V, SENSE = 5V -2 5.0 1.2 50 0.62 5.2 8 70 - 0.2 280 10 20 5.4 25 200 fOSC = 300kHz (Note 6) VSYNC = 0V to 5V VSYNC = 0V to 5V RFREQ = 80k 250 50 87 92 1.25 25 0.8/fOSC 0.3 300 350 1000 97 1.30 ns ns V V k V V mV mV % mV A kHz kHz % PARAMETER CONDITIONS MIN TYP MAX UNITS
ELECTRICAL CHARACTERISTICS
Low Dropout Regulator
Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: The LTC3704E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD * 120C/W) Note 4: The dynamic input supply current is higher due to power MOSFET gate charging (QG * fOSC). See Applications Information.
Note 5: The LTC3704 is tested in a feedback loop that servos VNFB to the reference voltage with the ITH pin forced to a voltage between 0V and 1.4V (the no load to full load operating voltage range for the ITH pin is 0.3V to 1.23V). Note 6: In a synchronized application, the internal slope compensation gain is increased by 25%. Synchronizing to a significantly higher ratio will reduce the effective amount of slope compensation, which could result in subharmonic oscillation for duty cycles greater than 50%. Note 7: Rise and fall times are measured at 10% and 90% levels.
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LTC3704 TYPICAL PERFOR A CE CHARACTERISTICS
NFB Voltage vs Temp
-1.25
-1.231
NFB CURRENT (A)
-1.24
NFB VOLTAGE (V)
NFB VOLTAGE (V)
-1.23
-1.22
-1.21 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G01
Shutdown Mode IQ vs VIN
30
20
SHUTDOWN MODE IQ (A)
SHUTDOWN MODE IQ (A)
20
Burst Mode IQ (A)
10
0 0 10 20 VIN (V)
30
Burst Mode IQ vs Temperature
500
18 16
400
Burst Mode IQ (A)
TIME (ns)
IQ (mA)
300
200
100
0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G07
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NFB Voltage Line Regulation
8.0 7.9 7.8 7.7 7.6 7.5 7.4 7.3 7.2 7.1 -1.229 0 5 10 15 20 VIN (V) 25 30 35
NFB Pin Current vs Temperature
-1.230
7.0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G03
3704 G02
Shutdown Mode IQ vs Temperature
VIN = 5V
Burst Mode IQ vs VIN
600 500
15
400 300 200 100
10
5
40
3704 G04
0 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G05
0
0
10
20 VIN (V)
30
40
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Dynamic IQ vs Frequency
CL = 3300pF IQ(TOT) = 550A + Qg * f
Gate Drive Rise and Fall Time vs CL
60 50
14 12 10 8 6 4
40 RISE TIME 30 20 FALL TIME 10
2 0 0 200 400 600 800 FREQUENCY (kHz) 1000 1200
0
0
2000
4000
6000 8000 CL (pF)
10000 12000
3704 G09
3704 G08
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LTC3704 TYPICAL PERFOR A CE CHARACTERISTICS
RUN Thresholds vs VIN
1.5
1.40
RUN THRESHOLDS (V)
1.4
RUN THRESHOLDS (V)
RT (k) 0 25 50 75 100 125 150 TEMPERATURE (C)
3704 G11
1.3
1.2 0 10 20 VIN (V)
30
Frequency vs Temperature
325 320
GATE FREQUENCY (kHz) 155 160
310 305 300 295 290 285 280 275 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C)
3704 G13
150
SENSE PIN CURRENT (A)
315
MAX SENSE THRESHOLD (mV)
INTVCC Load Regulation
TA = 25C 5.2
DROPOUT VOLTAGE (mV)
INTVCC VOLTAGE (V)
INTVCC VOLTAGE (V)
5.1
5.0 0 10 20 30 40 50 60 INTVCC LOAD (mA) 70 80
UW
3704 G10
3704 G16
RUN Thresholds vs Temperature
1000
RT vs Frequency
1.35
1.30
100
1.25
40
1.20 -50 -25
10
0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (kHz)
3704 G12
Maximum Sense Threshold vs Temperature
45
SENSE Pin Current vs Temperature
GATE HIGH VSENSE = 0V
40
145
140 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G14
35 -50 -25
0
25 50 75 100 125 150 TEMPERATURE (C)
3704 G15
INTVCC Line Regulation
5.4
500
INTVCC Dropout Voltage vs Current, Temperature
450 150C 400 350 300 250 200 150 100 50 25C 125C 75C
TA = 25C
5.3
5.2
0C -50C
5.1 0 5 10 15
20 25 VIN (V)
30
0
35
40
0
5
10 15 INTVCC LOAD (mA)
20
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LTC3704
PI FU CTIO S
RUN (Pin 1): The RUN pin provides the user with an accurate means for sensing the input voltage and programming the start-up threshold for the converter. The falling RUN pin threshold is nominally 1.248V and the comparator has 100mV of hysteresis for noise immunity. When the RUN pin is below this input threshold, the IC is shut down and the VIN supply current is kept to a low value (typ 10A). The Absolute Maximum Rating for the voltage on this pin is 7V. ITH (Pin 2): Error Amplifier Compensation Pin. The current comparator input threshold increases with this control voltage. Nominal voltage range for this pin is 0V to 1.40V. NFB (Pin 3): Receives the feedback voltage from the external resistor divider across the output. Nominal voltage for this pin in regulation is -1.230V. FREQ (Pin 4): A resistor from the FREQ pin to ground programs the operating frequency of the chip. The nominal voltage at the FREQ pin is 0.62V. MODE/SYNC (Pin 5): This input controls the operating mode of the converter and allows for synchronizing the operating frequency to an external clock. If the MODE/ SYNC pin is connected to ground, Burst Mode operation is enabled. If the MODE/SYNC pin is connected to INTVCC, or if an external logic-level synchronization signal is applied to this input, Burst Mode operation is disabled and the IC operates in a continuous mode. GND (Pin 6): Ground Pin. GATE (Pin 7): Gate Driver Output. INTVCC (Pin 8): The Internal 5.20V Regulator Output. The gate driver and control circuits are powered from this voltage. Decouple this pin locally to the IC ground with a minimum of 4.7F low ESR tantalum or ceramic capacitor. VIN (Pin 9): Main Supply Pin. Must be closely decoupled to ground. SENSE (Pin 10): The Current Sense Input for the Control Loop. Connect this pin to the drain of the power MOSFET for VDS sensing and highest efficiency. Alternatively, the SENSE pin may be connected to a resistor in the source of the power MOSFET. Internal leading edge blanking is provided for both sensing methods.
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LTC3704
BLOCK DIAGRA
FREQ 4 0.62V MODE/SYNC 5 NFB 3 200k 200k 50k S Q R BUFFER PWM LATCH IOSC V-TO-I OSC
0.30V EA gm 1.230V ITH 2 INTVCC 8 5.2V
LDO
1.230V SLOPE 1.230V
UV TO START-UP CONTROL GND BIAS VREF 6
3704 BD
2.00V
+
-
+
+
+
-
-
-
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RUN SLOPE COMPENSATION BIAS AND START-UP CONTROL
+
C2
1
-
100mV HYSTERESIS (1.348V RISING)
1.248V VIN 9
INTVCC GATE LOGIC GND 7
SENSE
+
C1
10
-
CURRENT COMPARATOR
BURST COMPARATOR
V-TO-I ILOOP RLOOP
VIN
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LTC3704
OPERATIO
Main Control Loop The LTC3704 is a constant frequency, current mode controller for DC/DC positive-to-negative converter applications. The LTC3704 is distinguished from conventional current mode controllers because the current control loop can be closed by sensing the voltage drop across the power MOSFET switch instead of across a discrete sense resistor, as shown in Figure 2. This sensing technique improves efficiency, increases power density, and reduces the cost of the overall solution.
VIN VIN SENSE GATE GND GND VSW
2a. SENSE Pin Connection for Maximum Efficiency (VSW < 36V)
VIN VIN GATE SENSE GND GND VSW
2b. SENSE Pin Connection for Precise Control of Peak IIN/IOUT or for VSW > 36V
Figure 2. Using the SENSE Pin On the LTC3704
For circuit operation, please refer to the Block Diagram of the IC and Figure 1. In normal operation, the power MOSFET is turned on when the oscillator sets the PWM latch and is turned off when the current comparator C1 resets the latch. The divided-down output voltage is compared to an internal 1.230V reference by the error amplifier EA, which outputs an error signal at the ITH pin. The voltage on the ITH pin sets the current comparator C1 input threshold. When the load current increases, a fall in the NFB voltage relative to the reference voltage causes the ITH pin to rise, which causes the current comparator C1 to trip at a higher peak inductor current value. The average inductor current will therefore rise until it equals the load current, thereby maintaining output regulation.
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The nominal operating frequency of the LTC3704 is programmed using a resistor from the FREQ pin to ground and can be controlled over a 50kHz to 1000kHz range. In addition, the internal oscillator can be synchronized to an external clock applied to the MODE/SYNC pin and can be locked to a frequency between 100% and 130% of its nominal value. When the MODE/SYNC pin is left open, it is pulled low by an internal 50k resistor and Burst Mode operation is enabled. If this pin is taken above 2V or an external clock is applied, Burst Mode operation is disabled and the IC operates in continuous mode. With no load (or an extremely light load), the controller will skip pulses in order to maintain regulation and prevent excessive output ripple. The RUN pin controls whether the IC is enabled or is in a low current shutdown state. A micropower 1.248V reference and comparator C2 allow the user to program the supply voltage at which the IC turns on and off (comparator C2 has 100mV of hysteresis for noise immunity). With the RUN pin below 1.248V, the chip is off and the input supply current is typically only 10A. The LTC3704 can be used either by sensing the voltage drop across the power MOSFET or by connecting the SENSE pin to a conventional shunt resistor in the source of the power MOSFET, as shown in Figure 2. Sensing the voltage across the power MOSFET maximizes converter efficiency and minimizes the component count, but limits the output voltage to the maximum rating for this pin (36V). By connecting the SENSE pin to a resistor in the source of the power MOSFET, the user is able to program output voltages significantly greater than the 36V maximum input voltage rating for the IC. Programming the Operating Mode For applications where maximizing the efficiency at very light loads (e.g., <100A) is a high priority, Burst Mode operation should be applied (i.e., the MODE/SYNC pin should be connected to ground). In applications where fixed frequency operation is more critical than low current efficiency, or where the lowest output ripple is desired, pulse-skip mode operation should be used and the MODE/SYNC pin should be connected to the INTVCC pin. This allows discontinuous conduction mode (DCM) operation down to near the limit defined by the chip's
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RSENSE
3704 F02
LTC3704
OPERATIO
minimum on-time (about 175ns). Below this output current level, the converter will begin to skip cycles in order to maintain output regulation. Figures 3 and 4 show the light load switching waveforms for Burst Mode and Pulse-Skip Mode operation for the converter in Figure 1. Burst Mode Operation Burst Mode operation is selected by leaving the MODE/ SYNC pin unconnected or by connecting it to ground. In normal operation, the range on the ITH pin corresponding to no load to full load is 0.30V to 1.2V. In Burst Mode operation, if the error amplifier EA drives the ITH voltage below 0.525V, the buffered ITH input to the current comparator C1 will be clamped at 0.525V (which corresponds to 25% of maximum load current). The inductor current peak is then held at approximately 30mV divided by the power MOSFET RDS(ON). If the ITH pin drops below 0.30V, the Burst Mode comparator B1 will turn off the power MOSFET and scale back the quiescent current of the IC to 250A (sleep mode). In this condition, the load current will be supplied by the output capacitor until the ITH voltage rises above the 50mV hysteresis of the burst comparator. At light loads, short bursts of switching (where the average inductor current is 25% of its maximum value) followed by long periods of sleep will be observed, thereby greatly improving converter efficiency. Oscilloscope waveforms illustrating Burst Mode operation are shown in Figure 3.
MODE/SYNC = 0V (Burst Mode OPERATION) VOUT 50mV/DIV
IL 5A/DIV
Figure 3. LTC3704 Burst Mode Operation (MODE/SYNC = 0V) at Low Output Current
Pulse-Skip Mode Operation With the MODE/SYNC pin tied to a DC voltage above 2V, Burst Mode operation is disabled. The internal, 0.525V
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buffered ITH burst clamp is removed, allowing the ITH pin to directly control the current comparator from no load to full load. With no load, the ITH pin is driven below 0.30V, the power MOSFET is turned off and sleep mode is invoked. Oscilloscope waveforms illustrating this mode of operation are shown in Figure 4.
MODE/SYNC = INTVCC (PULSE-SKIP MODE) VOUT 50mV/DIV IL 5A/DIV 2s/DIV
3704 F04
Figure 4. LTC3704 Low Output Current Operation with Burst Mode Operation Disabled (MODE/SYNC = INTVCC)
When an external clock signal drives the MODE/SYNC pin at a rate faster than the chip's internal oscillator, the oscillator will synchronize to it. In this synchronized mode, Burst Mode operation is disabled. The constant frequency associated with synchronized operation provides a more controlled noise spectrum from the converter, at the expense of overall system efficiency of light loads. When the oscillator's internal logic circuitry detects a synchronizing signal on the MODE/SYNC pin, the internal oscillator ramp is terminated early and the slope compensation is increased by approximately 30%. As a result, in applications requiring synchronization, it is recommended that the nominal operating frequency of the IC be programmed to be about 75% of the external clock frequency. Attempting to synchronize to too high an external frequency (above 1.3fO) can result in inadequate slope compensation and possible subharmonic oscillation (or jitter). The external clock signal must exceed 2V for at least 25ns, and should have a maximum duty cycle of 80%, as shown in Figure 5. The MOSFET turn on will synchronize to the rising edge of the external clock signal.
10s/DIV
3704 F03
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LTC3704
APPLICATIO S I FOR ATIO
MODE/ SYNC tMIN = 25ns 0.8T T T = 1/fO
2V TO 7V
GATE
D = 40%
ISW
1.230V
Programming the Operating Frequency The choice of operating frequency and inductor value is a tradeoff between efficiency and component size. Low frequency operation improves efficiency by reducing MOSFET and diode switching losses. However, lower frequency operation requires more inductance for a given amount of load current. The LTC3704 uses a constant frequency architecture that can be programmed over a 50kHz to 1000kHz range with a single external resistor from the FREQ pin to ground, as shown in Figure 1. The nominal voltage on the FREQ pin is 0.6V, and the current that flows into the FREQ pin is used to charge and discharge an internal oscillator capacitor. A graph for selecting the value of RT for a given operating frequency is shown in Figure 6.
1000
R2
Figure 7. Bypassing the LDO Regulator and Gate Driver Supply
100
For input voltages that don't exceed 7V (the absolute maximum rating for this pin), the internal low dropout regulator in the LTC3704 is redundant and the INTVCC pin can be shorted directly to the VIN pin. With the INTVCC pin shorted to VIN, however, the divider that programs the regulated INTVCC voltage will draw 10A of current from the input supply, even in shutdown mode. For applications that require the lowest shutdown mode input supply current, do not connect the INTVCC pin to VIN. Regardless of whether the INTVCC pin is shorted to VIN or not, it is always necessary to have the driver circuitry bypassed with a 4.7F tantalum or low ESR ceramic capacitor to ground immediately adjacent to the INTVCC and GND pins. In an actual application, most of the IC supply current is used to drive the gate capacitance of the power MOSFET. As a result, high input voltage applications in which a large power MOSFET is being driven at high frequencies can
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RT (k)
10
0 100 200 300 400 500 600 700 800 900 1000 FREQUENCY (kHz)
3704 F06
Figure 6. Timing Resistor (RT) Value
10
+
Figure 5. MODE/SYNC Clock Input and Switching Waveforms for Synchronized Operation
-
3404 F05
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INTVCC Regulator Bypassing and Operation An internal, P-channel low dropout voltage regulator produces the 5.2V supply which powers the gate driver and logic circuitry within the LTC3704, as shown in Figure 7. The INTVCC regulator can supply up to 50mA and must be bypassed to ground immediately adjacent to the IC pins with a minimum of 4.7F tantalum or ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the MOSFET gate driver.
VIN INPUT SUPPLY 2.5V TO 30V P-CH CIN R1 5.2V INTVCC
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LOGIC DRIVER GATE
CVCC 4.7F M1
GND PLACE AS CLOSE AS POSSIBLE TO DEVICE PINS
GND
3704 F07
LTC3704
APPLICATIO S I FOR ATIO
cause the LTC3704 to exceed its maximum junction temperature rating. The junction temperature can be estimated using the following equations: IQ(TOT) IQ + f * QG PIC = VIN * (IQ + f * QG) TJ = TA + PIC * RTH(JA) The total quiescent current IQ(TOT) consists of the static supply current (IQ) and the current required to charge and discharge the gate of the power MOSFET. The 10-pin MSOP package has a thermal resistance of RTH(JA) = 120C/W. As an example, consider a power supply with VIN = 5V and VSW(MAX) = 12V. The switching frequency is 500kHz, and the maximum ambient temperature is 70C. The power MOSFET chosen is the IRF7805, which has a maximum RDS(ON) of 11m (at room temperature) and a maximum total gate charge of 37nC (the temperature coefficient of the gate charge is low). IQ(TOT) = 600A + 37nC * 500kHz = 19.1mA PIC = 5V * 19.1mA = 95mW TJ = 70C + 120C/W * 95mW = 81.4C This demonstrates how significant the gate charge current can be when compared to the static quiescent current in the IC. To prevent the maximum junction temperature from being exceeded, the input supply current must be checked when operating in a continuous mode at high VIN. A tradeoff between the operating frequency and the size of the power MOSFET may need to be made in order to maintain a reliable IC junction temperature. Prior to lowering the operating frequency, however, be sure to check with power MOSFET manufacturers for their latest-and-greatest low QG, low RDS(ON) devices. Power MOSFET manufacturing technologies are continually improving, with newer and better performance devices being introduced almost yearly.
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Output Voltage Programming The output voltage is set by a resistor divider according to the following formula: R2 VO = VREF * 1 + + INFB * R2 R1 where VREF = -1.230V, and INFB is the current which flows out of the NFB pin (INFB = -7.5A). In order to properly dimension R2, including the effect of the NFB pin current, the following formula can be used:
R2 = VOUT - VREF VREF + INFB R1
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The nominal 7.5A current which flows out of the NFB pin has a production tolerance of approximately 2.5A, so an output divider current of 500A (R1 = 2.49k) results in a 0.5% uncertainty in the output voltage. For low power applications where the output voltage tolerance is less important, efficiency can be increased by increasing the value of R1. Programming Turn-On and Turn-Off Thresholds with the RUN Pin The LTC3704 contains an independent, micropower voltage reference and comparator detection circuit that remains active even when the device is shut down, as shown in Figure 8. This allows users to accurately program an input voltage at which the converter will turn on and off. The falling threshold voltage on the RUN pin is equal to the internal reference voltage of 1.248V. The comparator has 100mV of hysteresis to increase noise immunity. The turn-on and turn-off input voltage thresholds are programmed using a resistor divider according to the following formulas:
R2 VIN(OFF) = 1.248V * 1 + R1 R2 VIN(ON) = 1.348V * 1 + R1
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LTC3704
APPLICATIO S I FOR ATIO
The resistor R1 is typically chosen to be less than 1M. For applications where the RUN pin is only to be used as a logic input, the user should be aware of the 7V
+
R2
INPUT SUPPLY
OPTIONAL FILTER CAPACITOR
R1 1.248V POWER REFERENCE GND
3704 F08a
-
Figure 8a. Programming the Turn-On and Turn-Off Thresholds Using the RUN Pin
EXTERNAL LOGIC CONTROL
Figure 8b. On/Off Control Using External Logic
+
R2 1M INPUT SUPPLY
-
Figure 8c. External Pull-Up Resistor On RUN Pin for "Always On" Operation
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Absolute Maximum Rating for this pin! The RUN pin can be connected to the input voltage through an external 1M resistor, as shown in Figure 8c, for "always on" operation.
VIN RUN COMPARATOR BIAS AND START-UP CONTROL RUN 6V
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+ -
RUN COMPARATOR RUN 6V 1.248V
+ -
3704 F08b
VIN RUN COMPARATOR
RUN 6V
+ -
GND
1.248V
3704 F08c
LTC3704
APPLICATIO S I FOR ATIO
Applications Circuits
A simple positive-to-negative application circuit for the LTC3704 is shown in Figure 1. The basic operation of this circuit is shown in Figure 9. During the on-time the inductor currents flow through the switch, and during the off-time these currents flow through the output diode. The use of inductors in series with both the input and output results in continuous currents in these capacitors, resulting in low input and output noise. Discontinuous currents flow in the switch, the coupling capacitor, and the diode.
VIN VOUT
+ +
L1 L2 RL
+
ON
-
a) Current Flow During The Switch On-Time
VIN VOUT
+ +
L1 L2 RL
+
OFF
-
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b) Current Flow During The Switch Off-Time
Figure 9. Positive-to-Negative Converter Operation
Duty Cycle Considerations For the positive-to-negative converter shown in Figure 1, the duty cycle of the main switch in CCM is:
D= VO VO - VIN
where VO is a negative number. The maximum output voltage for this converter (in CCM) is:
VO(MAX) = VIN(MIN) * DMAX 1 - DMAX
The maximum duty cycle capability of the LTC3704 is typically 92%.
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Peak and Average Input and Switch Currents The control loop in the LTC3704 is measuring the peak switch current (either by using the RDS(ON) of the power MOSFET or by using a sense resistor in the MOSFET source), so the output current needs to be reflected back to the switch in order to dimension the power MOSFET and inductors properly. Based on the fact that, ideally, the input power is equal to the output power, the maximum average input current is:
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IIN(MAX) = - IO(MAX) *
where IO(MAX) current is:
DMAX 1 - DMAX is a negative number. The peak input
D IIN(PEAK) = - 1 + * IO(MAX) * MAX 2 1 - DMAX In a positive-to-negative converter, however, the switch current is equal to IIN + IO, so the maximum average switch current is:
1 1 - DMAX and the peak switch current is: ISW(MAX) = -IO(MAX) *
1 ISW(PEAK) = - 1 + * IO(MAX) * 2 1 - DMAX The maximum duty cycle, DMAX, should be calculated at minimum VIN. Ripple Current IL and the `' Factor The constant `' in the equation above represents the percentage peak-to-peak total ripple current in the inductor, relative to its maximum value. For example, if 30% ripple current is chosen, then = 0.30, and the peak current is 15% greater than the average. For a current mode converter operating in CCM, slope compensation must be added for duty cycles above 50% in order to avoid subharmonic oscillation. For the LTC3704, this ramp compensation is internal. Having an internally fixed ramp compensation waveform, however, does place some constraints on the value of the inductor and the operating frequency. If too large an inductor is used, the resulting current ramp (IL) will be small relative to the
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LTC3704
APPLICATIO S I FOR ATIO
internal ramp compensation (at duty cycles above 50%), and the converter operation will approach voltage mode (ramp compensation reduces the gain of the current loop). If too small an inductor is used, but the converter is still operating in CCM (near critical conduction mode), the internal ramp compensation may be inadequate to prevent subharmonic oscillation. To ensure good current mode gain and avoid subharmonic oscillation, it is recommended that the ripple current in the inductor fall in the range of 20% to 40% of the maximum average switch current. For example, if the maximum average switch current is 1A, choose a IL between 0.2A and 0.4A, and a value `' between 0.2 and 0.4. Inductor Selection Selecting inductors for a positive-to-negative converter is slightly more complicated than for a single-inductor topology like a buck or boost. The use of separate, uncoupled inductors can reduce the size of the solution, at the expense of input and output ripple. Using a coupled inductor complicates the design procedure, but can result in significantly lower input and/or output ripple. It will also reduce the number of components that the purchasing department has to keep track of. Regardless of the design goals, however, the inductor selection process is an iterative one. The best recommendation is to use the equations as a guideline, and then to build a solution and measure the circuit's performance. If the measured performance deviates from the design guidelines, substitute a bigger (or smaller) inductor, as appropriate, and repeat the measurements. In addition, do your best to minimize layout parasitics, which can have a significant effect on circuit performance. The inductor currents for a positive-to-negative converter are calculated at full load current and minimum input voltage. The peak inductor currents can be significantly higher than the output current, especially with smaller inductors and lighter loads. The following formulae assume uncoupled inductors and CCM operation.
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D IL1(PEAK) = - 1 + * IO(MAX) * MAX 1 - DMAX 2 IL2(PEAK) = - 1 + * IO(MAX) 2
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where "" represents the percentage of ripple current. In a positive-to-negative converter, however, the switch current is the sum of the two inductor currents. Therefore,
ISW(PEAK) = - 1 +
1 * IO(MAX) * 2 1 - DMAX
Since the control loop is looking at the switch current, and since the internal slope compensation is acting on this switch current, the ripple current percentage should be between 20% and 40% of the maximum average current at VIN(MIN) and IO(MAX). This corresponds to a value of "" in the equations above between 0.20 and 0.40. Expressing this ripple current as a function of the output current results in the following equation for calculating the inductor value: L1 = L2 = where: VIN(MIN) ISW * f * DMAX
ISW = - * IO(MAX) *
1 1 - DMAX
By using a coupled inductor with a 1:1 turns ratio, the value of inductance in the equation above can be replaced by 2L due to mutual inductance. Doing this maintains the same total ripple current and energy storage in the inductor. Substituting 2L yields the following equation for 1:1 coupled inductors: L1 = L2 = VIN(MIN) 2 * IL * f * DMAX
For the case of uncoupled inductors, choose minimum saturation currents based on the peak currents outlined in
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APPLICATIO S I FOR ATIO
the initial equations for IL1(PEAK) and IL2(PEAK). If a coupled inductor is used, make sure that the minimum saturation current for the parallel configuration exceeds the maximum switch current, or:
ILSAT (MIN) - 1 +
1 * IO(MAX) * 2 1 - DMAX
The saturation current rating should be checked at minimum input voltage (which results in the highest average inductor current) and maximum load current. Operating in Discontinuous Mode Discontinuous mode operation occurs when the load current is low enough to allow the inductor current to run out during the off-time of the switch, as shown in Figure 10. Once the inductor current is near zero, the switch and diode capacitances resonate with the inductance to form damped ringing at 1MHz to 10MHz. If the off-time is long enough, the drain voltage will settle to the input voltage. Depending on the input voltage and the residual energy in the inductor, this ringing can cause the drain of the power MOSFET to go below ground where it is clamped by the body diode. This ringing is not harmful to the IC and it has not been shown to contribute significantly to EMI. Any attempt to damp it with a snubber will degrade the efficiency.
VDS 10V/DIV
IL1 1A/DIV
VIN = 15V NO LOAD
1s/DIV
3704 F10
Figure 10. Discontinuous Mode Waveforms (MODE/SYNC = INTVCC, Pulse-Skip Mode) for the Circuit in Figure 1.
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Power MOSFET or Sense Resistor Selection If the maximum voltage on the drain of the power MOSFET (which is VIN(MAX) + VOUT, plus any transients) is less than 36V then the circuit can take advantage of the LTC3704's No RSENSE technology in order to improve efficiency and eliminate the sense resistor. For higher switch voltages the SENSE pin should be connected to a resistor in the source of the power MOSFET, as shown in Figure 2. Internal leading-edge blanking is provided in the LTC3704 to eliminate the need for filtering components on the SENSE pin. In both positive-to-negative and flyback converters the maximum switch current is equal to the input current plus the output current. As a result, the peak switch current is:
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ISW(PEAK) = - 1 +
1 * IO(MAX) * 2 1 - DMAX
where IO(MAX) is a negative number. During the switch on-time, the control circuit limits the maximum voltage drop across the power MOSFET to 150mV (at low duty cycles). The peak switch current is therefore limited to 150mV/RDS(ON). The relationship between the maximum load current, the duty cycle and the RDS(ON) of the power MOSFET is:
RDS(ON)
or
VSENSE(MAX) ISW(PEAK)
DMAX - 1 1 + * IO(MAX) * 2
RDS(ON) VSENSE(MAX) *
again, where IO(MAX) is a negative number. The VSENSE(MAX) term is typically 150mV at low duty cycle, and is reduced to about 100mV at a duty cycle of 92% due to slope compensation, as shown in Figure 11. The term accounts for the temperature coefficient of the RDS(ON) of the MOSFET, which is typically 0.4%/C. Figure 12 illustrates the variation of RDS(ON) over temperature for a typical power MOSFET (normalized for simplicity).
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MAXIMUM CURRENT SENSE VOLTAGE (mV)
200 150
T NORMALIZED ON RESISTANCE
100
50
0
0
0.2
0.5 0.4 DUTY CYCLE
0.8
1.0
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Figure 11. Maximum SENSE Threshold Voltage vs Duty Cycle
Another method of choosing which power MOSFET to use is to check the maximum output current for a given RDS(ON), since MOSFET on-resistances are generally available in discrete values.
IO(MAX) = - VSENSE(MAX) *
1 - DMAX 1 + * RDS(ON) * 2
For the case where a conventional sense resistor is used,
RSENSE = VSENSE(MAX) *
DMAX - 1 1 + * IO(MAX) 2
Sense resistors are generally low TC and are available with different ranges of tolerance depending on price. The power dissipated in the sense resistor is:
PSENSE = ISW(PEAK) * RSENSE * DMAX
2
Calculating Power MOSFET Switching and Conduction Losses and Junction Temperatures In order to calculate the junction temperature of the power MOSFET, the power dissipated by the device must be known. This power dissipation is a function of the duty cycle, the load current and the junction temperature itself (due to the positive temperature coefficient of its RDS(ON)).
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2.0 1.5 1.0 0.5 0 - 50 50 100 0 JUNCTION TEMPERATURE (C) 150
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Figure 12. Normalized RDS(ON) vs Temperature
As a result, some iterative calculation is normally required to determine a reasonably accurate value. Since the controller is using the MOSFET as both a switching and a sensing element, care should be taken to ensure that the converter is capable of delivering the required load current over all operating conditions (line voltage and temperature), and for the worst-case specifications for VSENSE(MAX) and the RDS(ON) of the MOSFET listed in the manufacturer's data sheet. The power dissipated by the MOSFET in a positive-tonegative converter is:
- IO(MAX) PFET = * RDS(ON) * DMAX * T 1 - DMAX IO(MAX) + k * (VIN - VO )1.85 * * C RSS * f 1 - DMAX
2
where IO(MAX) and VO are negative numbers. The first term in the equation above represents the I2R losses in the device, and the second term, the switching losses. The constant, k = 1.7, is an empirical factor inversely related to the gate drive current and has the dimension of 1/current. From a known power dissipated in the power MOSFET, its junction temperature can be obtained using the following formula: TJ = TA + PFET * RTH(JA)
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APPLICATIO S I FOR ATIO
The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the case to the ambient temperature (RTH(CA)). This value of TJ can then be compared to the original, assumed value used in the iterative calculation process. Output Diode Selection To maximize efficiency, a fast switching diode with low forward drop and low reverse leakage is desired. The output diode in a positive-to-negative converter conducts current during the switch off-time. The peak reverse voltage that the diode must withstand is equal to VIN(MAX) - VO. The average forward current in normal operation is equal to the output current, and the peak current is equal to the peak inductor current.
ID(PEAK)
= - 1+
1 * IO(MAX) 2 1 - DMAX
The power dissipated by the diode is: PD = IO(MAX) * VD and the diode junction temperature is: TJ = TA + PD * RTH(JA) The RTH(JA) to be used in this equation normally includes the RTH(JC) for the device plus the thermal resistance from the board to the ambient temperature in the enclosure. Remember to keep the diode lead lengths short and to observe proper switch-node layout (see Board Layout Checklist) to avoid excessive ringing and increased dissipation. Selecting the DC Coupling Capacitor The voltage on the coupling capacitor in a positive-tonegative converter is VIN(MAX) - VO, plus any additional V due to the ripple currents in the inductors. Generally, the DC coupling capacitor is dimensioned based on the high RMS ripple which flows in it, as shown in Figure 13. The minimum RMS current rating of this capacitor must exceed:
IRMS(CAP) = - IO(MAX) *
DMAX 1 - DMAX
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1A/DIV 500ns/DIV
3704 F13
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Figure 13. Ripple Current in the DC Coupling Capacitor
A low ESR and ESL, X5R- or X7R-type ceramic capacitor is recommended here. Selecting the Output Capacitor The output ripple voltage appears as a triangular waveform riding on VO, due to the ripple current of L2 (the DC component of the current in L2 equals the output current). This ripple current flows through the ESR and bulk capacitance of the output capacitor to produce the overall ripple voltage on this node. Using the off-time to calculate this ripple current results in the following equation for IL2: IL2 = - 1 - DMAX VO * f L2
where VO is a negative number. The output ripple voltage is therefore:
VO(P -P) =
1 - DMAX VO * f L2 1 - ESR - 8 * f * CO
The ESR can be minimized by using high quality, X5R- or X7R-dielectric ceramic capacitor in parallel with a larger value tantalum or aluminum electrolytic bulk capacitor. Depending upon the application, it may be that the ceramic capacitor alone will be sufficient. The RMS ripple current rating of the output capacitor needs to be greater than:
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LTC3704
APPLICATIO S I FOR ATIO
1 (1 - DMAX ) VO IRMS(COUT ) * * 12 f L2
It should be noted that these equations assume no coupling between the inductors. If the inductors are wound on the same core, the ripple currents at the input and output can be tuned to very low values, and so the equations above would be extremely conservative. It is highly recommended that the user experiment in the lab with the same magnetics and capacitors which will be used in production. Note that the ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life. This
Table 1. Recommended Component Manufacturers
VENDOR AVX BH Electronics Coilcraft Coiltronics Diodes, Inc Fairchild General Semiconductor International Rectifier IRC Kemet Magnetics Inc Microsemi Murata-Erie Nichicon On Semiconductor Panasonic Sanyo Sumida Taiyo Yuden TDK Thermalloy Tokin Toko United Chemicon Vishay/Dale Vishay/Siliconix Vishay/Sprague Zetex COMPONENTS Capacitors Inductors, Transformers Inductors Inductors Diodes MOSFETs Diodes MOSFETs, Diodes Sense Resistors Tantalum Capacitors Toroid Cores Diodes Inductors, Capacitors Capacitors Diodes Capacitors Capacitors Inductors Capacitors Capacitors, Inductors Heat Sinks Capacitors Inductors Capacitors Resistors MOSFETs Capacitors Small-Signal Discretes TELEPHONE (207) 282-5111 (952) 894-9590 (847) 639-6400 (407) 241-7876 (805) 446-4800 (408) 822-2126 (516) 847-3000 (310) 322-3331 (361) 992-7900 (408) 986-0424 (800) 245-3984 (617) 926-0404 (770) 436-1300 (847) 843-7500 (602) 244-6600 (714) 373-7334 (619) 661-6835 (847) 956-0667 (408) 573-4150 (562) 596-1212 (972) 243-4321 (408) 432-8020 (847) 699-3430 (847) 696-2000 (605) 665-9301 (800) 554-5565 (207) 324-4140 (631) 543-7100 WEB ADDRESS avxcorp.com bhelectronics.com coilcraft.com coiltronics.com diodes.com fairchildsemi.com generalsemiconductor.com irf.com irctt.com kemet.com mag-inc.com microsemi.com murata.co.jp nichicon.com onsemi.com panasonic.com sanyo.co.jp sumida.com t-yuden.com component.tdk.com aavidthermalloy.com tokin.com tokoam.com chemi-com.com vishay.com vishay.com vishay.com zetex.com
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makes it advisable to further derate the capacitor or to choose a capacitor rated at a higher temperature than required. Several capacitors may also be placed in parallel to meet size or height requirements in the design. Manufacturers such as Nichicon, United Chemicon and Sanyo should be considered for high performance throughhole capacitors. The OS-CON semiconductor dielectric capacitor available from Sanyo has the lowest product of ESR and size of any aluminum electrolytic, at a somewhat higher price. In surface mount applications, multiple capacitors may have to be placed in parallel in order to meet the ESR or RMS current handling requirements of the application.
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APPLICATIO S I FOR ATIO
Aluminum electrolytic and dry tantalum capacitors are both available in surface mount packages. In the case of tantalum, it is critical that the capacitors have been surge tested for use in switching power supplies. An excellent choice is AVX TPS series of surface mount tantalum. Also, ceramic capacitors are now available with extremely low ESR, ESL and high ripple current ratings. Input Capacitor Selection The input voltage source impedance determines the size of the input capacitor, which is typically in the range of 10F to 100F. A low ESR capacitor is recommended, although it is not as critical as for the output capacitor. The RMS input capacitor ripple current for a positive-tonegative converter is: IRMS(CIN) = 1 VIN(MIN) * * DMAX 12 L1* f
Please note that the input capacitor can see a very high surge current when a battery is suddenly connected to the input of the converter and solid tantalum capacitors can fail catastrophically under these conditions. Be sure to specify surge-tested capacitors! Burst Mode Operation and Considerations The choice of MOSFET RDS(ON) and inductor value also determines the load current at which the LTC3704 enters Burst Mode operation. When bursting, the controller clamps the peak inductor current to approximately:
IBURST(PEAK) = 30mV RDS(ON)
which represents about 20% of the maximum 150mV SENSE pin voltage. The corresponding average current depends upon the amount of ripple current. Lower inductor values (higher IL) will reduce the load current at which Burst Mode operations begins, since it is the peak current that is being clamped. The output voltage ripple can increase during Burst Mode operation if IL is substantially less than IBURST. This can occur if the input voltage is very low or if a very large inductor is chosen. At high duty cycles, a skipped cycle
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causes the inductor current to quickly decay to zero. However, because IL is small, it takes multiple cycles for the current to ramp back up to IBURST(PEAK). During this inductor charging interval, the output capacitor must supply the load current and a significant droop in the output voltage can occur. Generally, it is a good idea to choose a value of inductor IL between 20% and 40% of IIN(MAX). The alternative is to either increase the value of the output capacitor or disable Burst Mode operation using the MODE/SYNC pin. Burst Mode operation can be defeated by connecting the MODE/SYNC pin to a high logic-level voltage (either with a control input or by connecting this pin to INTVCC). In this mode, the burst clamp is removed, and the chip can operate at constant frequency from continuous conduction mode (CCM) at full load, down into deep discontinuous conduction mode (DCM) at light load. Prior to skipping pulses at very light load (i.e., < 5-10% of full load), the controller will operate with a minimum switch on-time in DCM. Pulse skipping prevents a loss of control of the output at very light loads and reduces output voltage ripple. Checking Transient Response The regulator loop response can be verified by looking at the load transient response. Switching regulators generally take several cycles to respond to an instantaneous step in resistive load current. When the load step occurs, VO immediately shifts by an amount equal to (ILOAD)(ESR), and then CO begins to charge or discharge (depending on the direction of the load step) as shown in Figure 14. The
VOUT (AC) 100mV/DIV 2A IOUT (DC) 1A/DIV 0.5A VIN = 5V VOUT = -5V 250s/DIV
3704 F14
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Figure 14. Load Step Response for the Circuit in Figure 1.
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LTC3704
APPLICATIO S I FOR ATIO
regulator feedback loop acts on the resulting error amp output signal to return VO to its steady-state value. During this recovery time, VO can be monitored for overshoot or ringing that would indicate a stability problem. A second, more severe transient can occur when connecting loads with large (> 1F) supply bypass capacitors. The discharged bypass capacitors are effectively put in parallel with CO, causing a nearly instantaneous drop in VO. No regulator can deliver enough current to prevent this problem if the load switch resistance is low and it is driven quickly. The only solution is to limit the rise time of the switch drive in order to limit the inrush current di/dt to the load. Design Example: A 5V to 15V Input, -5V at 2A Output Positive-to-Negative Converter The design example presented here will be for the circuit shown in Figure 1. The input voltage range is 5V to 15V, and the output is -5V. The maximum load current is 2A at an input voltage of 5V (3A peak), and 3A at an input voltage of 15V (5A peak). 1. The maximum duty cycle of the main switch is:
DMAX = -5 VOUT = = 50% VOUT - VIN(MIN) -10
2. Pulse-Skip operation is chosen, so the MODE/SYNC pin is connected to the INTVCC pin. 3. The operating frequency is chosen to be 300kHz to reduce the size of the inductors. From Figure 5, the resistor from the FREQ pin to ground is 80.6k. 4. A total inductor ripple current of 40% of the maximum is chosen, so the inductor ripple current is:
D IL1 = - * IO(MAX) * MAX 1 - DMAX 0.5 IL1 = 0.4 * 2.0 * = 0.8A 1 - 0.5
For a standard 1:1 coupled inductor, the inductance is therefore:
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L1 = L2 = VIN(MIN) * DMAX 2 * IL1 * f 5 * 0.5 = 5.2H = 2 * 0.8 * 300k
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The minimum saturation current for this inductor is:
ILSAT (MIN) - 1 +
1 * IO(MAX) * 2 1 - DMAX 1 = 1.2 * 2.0 * = 4.8A 1 - 0.5
The inductor chosen is a BH Electronics part # 510-1009, which has an open circuit parallel inductance of 4.56H and a maximum dc current rating of 6.5A. 5. For the power MOSFET,
RDS(ON) VSENSE(MAX) * DMAX - 1 1 + * IO(MAX) * 2
At the maximum duty cycle of 50%, the maximum SENSE pin voltage is reduced to 130mV due to slope compensation, as shown in Figure 11. Assuming a maximum junction temperature of 125C for the power MOSFET, = 1.5, and RDS(ON) 0.130 * 0.5 - 1 = 18.1m -1.2 * 2.0 * 1.5
The MOSFET chosen was Siliconix/Vishay's Si4884, which has a maximum RDS(ON) = 16.5m at VGS = 4.5V at 25C. The minimum BVDSS = 30V and the maximum gate charge is QG = 20nC. 6. The output diode must withstand a reverse voltage of VIN(MAX) - VO = 20V and a continuous current of IO(MAX) = 5.0A (peak output current at VIN = 15V). The peak current in the diode is: ID(PEAK) = 1 + * IO(MAX) = 6A 2 The power dissipated in this diode at full load is:
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APPLICATIO S I FOR ATIO
PD = IO(MAX) * VF
Assuming a maximum junction temperature of 125C and a forward voltage of approximately 0.33V at 3A (the maximum output current at VIN = 15V), this diode will dissipate 1W at full load. The diode selected was the MBRD835L from On Semiconductor, packaged in a D-Pak.
C1 1nF R1 154k 1% 1 2 RUN ITH LTC3704 RC 3k CC1 4.7nF D2 RT 80.6k 1% Q1 RSS1 750 RFB1 1.21k 1% 3 4 5 NFB FREQ MODE/SYNC INTVCC GATE GND SENSE VIN 9 10
R2 68.1k 1%
RFB2 3.65k 1% CIN: TDK C5750X5R1C476M CDC : TDK C5750X7R1C476M COUT: TDK C5750X5R0J107M CVCC: TAIYO YUDEN LMK316BJ475ML
RSS2 100
CSS 10nF
Figure 15. 5V to 15V Input, -5V Output at 2A-3A(5A Peak) Positive-to-Negative Converter with Soft-Start and Undervoltage Lockout.
100 90 80 VIN = 5V VIN = 15V VIN = 10V
IO(MAX) (A)
EFFICIENCY (%)
70 60 50 40 30 20 0.001
FET = Si4884 L = BH510-1009 VO = -5V FREQ = 300kHz 0.01 1 0.1 OUTPUT CURRENT (A) 10
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Figure 16. Efficiency vs Output Current
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7. The DC coupling capacitor must be capable of handling an RMS current of:
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ID(PEAK) = -IO(MAX) *
DMAX = 3A 1 - DMAX
VIN 5V to 15V VOUT -5.0V 2A to 3A (5A PEAK)
*
L1*
*
L2*
8 7 6
M1
CDC 47F X5R
COUT 100F X5R (X2)
D1 CVCC 4.7F X5R CIN 47F X5R GND
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D1: ON SEMICONDUCTOR MBRD835L D2: CDMSH-3 L1, L2: BH ELECTRONICS BH510-1009 M1: SILICONICS/VISHAY Si4884 Q1: MMBT3904
6 5 4 3 2 1 0
5
10 INPUT VOLTAGE (V)
15
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Figure 17. Maximum Output Current vs Input Voltage
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VOUT (AC) 10mV/DIV
IL2 (DC) 1A/DIV
VIN = 5V IOUT = -2V
1s/DIV
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Figure 18. Output Ripple Voltage and Inductor Current for the Circuit in Figure 15
VOUT 1V/DIV
VOUT (AC) 100mV/DIV
VOUT IOUT 1A/DIV
2A IOUT (DC) 1A/DIV 0.5A
VIN = 15V
250s/DIV
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Figure 20. Load Step Response at VIN = 15V for the Circuit in Figure 15
The capacitor used was a TDK 47F, 16V X5R-dielectric ceramic (C5750X5R1C476M), mainly because of its low ESR (2.4m) and high RMS current capability. 8. The peak-to-peak output ripple is:
VO(P -P) =
1 - DMAX VO * f L2 1 - ESR - 8 * f * CO
As a first try, a TDK 100F, 6.3V X5R-dielectric ceramic capacitor was chosen (C5750X5R0J107M). This capacitor has a very low 1.6m of ESR. As a result, the peak-topeak output ripple voltage is:
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VOUT (AC) 100mV/DIV 2A IOUT (DC) 1A/DIV 0.5A VIN = 5V 250s/DIV
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Figure 19. Load Step Response at VIN = 5V for the Circuit in Figure 15
IOUT
VIN = 5V
1ms/DIV
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Figure 21. Soft-Start for the Circuit in Figure 15
VO(P -P) =
1 - 0.5 5.0 * 300k 3.5
1 - 0.0016 - = 13.7mV 8 * 300k * 100 This ripple voltage calculation also assumes no coupling between the inductors, making the 13.7mV number very conservative. Figure 15 illustrates the same basic application shown in Figure 1, with the added features of soft-start and undervoltage lockout on the input supply. Figures 16 through 21 illustrate the measured performance for this converter. The peak efficiency is 87% at a load current of 2A and the peak-to-peak output ripple is less than 10mV. Figures 19 and 20 illustrate the load step response at 5V and 15V input, and Figure 21, the start-up characteristics with a resistive load.
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PC Board Layout Checklist
1. In order to minimize switching noise and improve output load regulation, the GND pin of the LTC3704 should be connected directly to 1) the negative terminal of the INTVCC decoupling capacitor, 2) the negative terminal of the output decoupling capacitors, 3) the
R3 C3 CC2 CC1 R2 R1 RT RC R4 PIN 1 LTC3704 CIN
CVCC
PSEUDO-KELVIN SIGNAL GROUND CONNECTION TRUE REMOTE OUTPUT SENSING
COUT
COUT
VIAS TO GROUND PLANE
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Figure 22. LTC3704 Positive-to-Negative Converter Suggested Layout
C3
R3
R4 VOUT L1
CC2 CC1 1 RC 2 RUN ITH LTC3704 3 4 RT 5 NFB FREQ MODE/ SYNC INTVCC GATE GND 8 7 6 CVCC CIN M1 D1 SENSE VIN 10 9 CDC
R1 R2
PSEUDO-KELVIN GROUND CONNECTION BOLD LINES INDICATE HIGH CURRENT PATHS
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Figure 23. LTC3704 Positive-to-Negative Converter Layout Diagram
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source of the power MOSFET or the bottom terminal of the sense resistor, 4) the negative terminal of the input capacitor and 5) at least one via to the ground plane immediately adjacent to Pin 6. The ground trace on the top layer of the PC board should be as wide and short as possible to minimize series resistance and inductance.
VIN 1 CDC M1 2 3 4 5 6 D1 L2 L1 12 11 10 9 8 7 VOUT
VIN L2 COUT GND
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LTC3704
APPLICATIO S I FOR ATIO
2. Beware of ground loops in multiple layer PC boards. Try to maintain one central ground node on the board and use the input capacitor to avoid excess input ripple for high output current power supplies. If the ground plane is to be used for high DC currents, choose a path away from the small-signal components. 3. Place the CVCC capacitor immediately adjacent to the INTVCC and GND pins on the IC package. This capacitor carries high di/dt MOSFET gate drive currents. A low ESR X5R-dielectric 4.7F ceramic capacitor works well here. 4. The high di/dt loop from the drain of the power MOSFET, through the coupling capacitor and back through the diode to ground should be kept as tight as possible to reduce inductive ringing. Excess inductance can cause increased stress on the power MOSFET and increase HF noise on the drain node. It is also important to keep the cathode of the diode as close as possible to the MOSFET source or the bottom of the sense resistor. 5. Check the stress on the power MOSFET by measuring its drain-to-source voltage directly across the device terminals (reference the ground of a single scope probe directly to the source pad on the PC board). Beware of inductive ringing which can exceed the maximum specified voltage rating of the MOSFET. If this ringing cannot be avoided and exceeds the maximum rating of the device, either choose a higher voltage device or specify an avalanche-rated power MOSFET. Not all MOSFETs are created equal (some are more equal than others).
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6. Place the small-signal components away from high frequency switching nodes. In the layout shown in Figure 22, all of the small-signal components have been placed on one side of the IC and all of the power components have been placed on the other. This also allows the use of a pseudo-Kelvin connection for the signal ground, where high di/dt gate driver currents flow out of the IC ground pin in one direction (to the bottom plate of the INTVCC decoupling capacitor) and small-signal currents flow in the other direction. 7. If a sense resistor is used in the source of the power MOSFET, minimize the capacitance between the SENSE pin trace and any high frequency switching nodes. The LTC3704 contains an internal leading edge blanking time of approximately 180ns, which should be adequate for most applications. 8. For optimum load regulation and true remote sensing, the top of the output resistor divider should connect independently to the top of the output capacitor (Kelvin connection), staying away from any high dV/dt traces. Place the divider resistors near the LTC3704 in order to keep the high impedance FB node short. 9. For applications with multiple switching power converters connected to the same input supply, make sure that the input filter capacitor for the LTC3704 is not shared with other converters. AC input current from another converter could cause substantial input voltage ripple, and this could interfere with the operation of the LTC3704. A few inches of PC trace or wire (L 100nH) between the CIN of the LTC3704 and the actual source VIN should be sufficient to prevent current sharing problems.
sn3704 3704fs
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LTC3704
APPLICATIO S I FOR ATIO
1 2 RUN ITH LTC3704 RC 14.7k 3 4 5 CC1 4.7nF RT 80.6k 1% RFB1 2.49k 1% RFB2 13.7k 1% NFB FREQ MODE/SYNC INTVCC GATE GND SENSE VIN
D1: DIODES INC B320B L1, L2: BH ELECTRONICS BH 510-1009 M1: SILICONIX Si9426
Figure 24. 3V to 5V Input, -8V at 1.2A Output Converter
3
EFFICIENCY (%)
2
IO(MAX) (A)
1
0 3.0
3.5
4.0 INPUT VOLTAGE (V)
4.5
5.0
3704 F25
Figure 25. Maximum Output Current vs Input Voltage
VOUT (AC) 100mV/DIV
IOUT (DC) 1.2A 0.5A/DIV
0.6A
VIN = 3V
250s/DIV
3704 F27
Figure 27. Load Step Response at 3V Input
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VIN 3V to 5V
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L1* 10 9 CDC 22F X5R
*
L2*
VOUT -8.0V 1.2A to 2.5A
8 7 6
M1
COUT 100F X5R
D1 CVCC 4.7F X5R CIN 47F X5R GND
3704 F24
100 95 90 85 80 75 70 65 60 55 50 0.001 0.01 1 0.1 OUTPUT CURRENT (A) 10
3704 F26
VIN = 5V
VIN = 3V
Figure 26. Output Efficiency at 3V and 5V Input
VOUT (AC) 100mV/DIV
IOUT (DC) 1.2A 0.5A/DIV
0.6A
VIN = 3V
250s/DIV
3704 F27
Figure 28.Load Step Response at 5V Input
sn3704 3704fs
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LTC3704
APPLICATIO S I FOR ATIO
R1 49.9k 1% CR 1nF CC2 100pF
UV + = 5.4V UV - = 5.0V
R2 150k 1%
RUN ITH
SENSE VIN LTC3704
RC 82k CC1 1nF
NFB FREQ RT 120k MODE/SYNC
INTVCC GATE GND
+
f = 200kHz RFB2 45.3k 1%
RFB1 2.49k 1%
* VP5-0155 (PRIMARY = 3 WINDINGS IN PARALLEL)
3704 F29
Figure 29. High Power SLIC Supply
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GND
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4 VIN 7V TO 12V
D2 10BQ060
+
C3 10F 25V X5R VOUT1 -24V 200mA
+
CIN 220F 16V TPS
*
T1* 1, 2, 3 5
D3 10BQ060
+
*
C4 10F 25V X5R
+
COUT 3.3F 100V
*
6 C1 4.7F 10V X5R IRL2910 RS 0.012
D4 10BQ060
+
C5 10F 25V X5R
VOUT2 -72V 200mA
C2 4.7F 50V X5R
sn3704 3704fs
LTC3704
PACKAGE DESCRIPTIO
5.23 (.206) MIN
0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT
0.254 (.010) GAUGE PLANE
0.18 (.007) SEATING PLANE 0.17 - 0.27 (.007 - .011) 0.13 0.05 (.005 .002)
MSOP (MS) 1001
NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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MS Package 10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 0.127 (.035 .005) 3.2 - 3.45 (.126 - .136) 3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF DETAIL "A" 0 - 6 TYP 12345 0.53 0.01 (.021 .006) DETAIL "A" 1.10 (.043) MAX 0.86 (.034) REF 4.88 0.10 (.192 .004) 3.00 0.102 (.118 .004) NOTE 4 0.50 (.0197) TYP
sn3704 3704fs
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LTC3704
TYPICAL APPLICATIO
C9 1nF OPTIONAL
R5 68.1k 1% RUN ITH RC 9.1k NFB CC2 330pF CC1 10nF RT 80.6k 1% FREQ MODE/SYNC LTC3704 INTVCC GATE GND SENSE VIN CIN 47F 16V CVCC 4.7F
3704 TA02
R1 1.21k 1%
R2 3.65k 1%
CIN: TDK C5570X5R1C476M COUT1: TDK C5750X5R0J107M COUT2: PANASONIC EEFUE0J151R CDC: TDK C5750X7R1E226M CVCC: TDK C2012X5R0J475K
D1: FAIRCHILD MBR2035CT L1, L2: COILTRONICS VP5-0053 (*COUPLED INDUCTORS, WITH 3 WINDINGS IN PARALLEL ON PRIMARY AND SECONDARY) M1: INTERNATIONAL RECTIFIER IRF7822
RELATED PARTS
PART NUMBER LT(R)1175 LT1619 LTC1624 LTC1700 LTC1871 LTC1872 LT1930 LT1931 LT1964 LTC3401/LTC3402 DESCRIPTION Negative Linear Low Dropout Regulator Current Mode PWM Controller Current Mode DC/DC Controller No RSENSE Synchronous Step-Up Controller No RSENSE Boost, Flyback and SEPIC Controller SOT-23 Boost Controller 1.2MHz, SOT-23 Boost Converter Inverting 1.2MHz, SOT-23 Converter ThinSOTTM Linear Low Dropout Regulator 1A/2A 3MHz Synchronous Boost Converters COMMENTS User-Selectable Current Limit from 200mA to 800mA, 0.4V Dropout at 500mA, 45A Operating Current 300kHz Fixed Frequency, Boost, SEPIC, Flyback Topology SO-8; 200kHz Operating Frequency; Buck, Boost, SEPIC Design; VIN Up to 36V Up to 95% Efficiency, Operation as Low as 0.9V Input 2.5V VIN 30V, Current Mode Control, Programmable fOSC from 50kHz to 1MHz Delivers Up to 5A, 550kHz Fixed Frequency, Current Mode Up to 34V Output, 2.6V VIN 16V, Miniature Design Positive-to-Negative DC/DC Conversion, Miniature Design 200mA Output Current, Low Noise, 340mV Drop Out at 200mA, 5-Lead ThinSOT Up to 97% Efficiency, Very Small Solution, 0.5V VIN 5V
ThinSOT is a trademark of Linear Technology Corporation.
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 q FAX: (408) 434-0507
q
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2001
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High Efficiency Positive-to-Negative Converter
R4 154k 1% VIN 5V TO 15V L1* CDC 22F 25V X7R L2* M1 D1 COUT1 100F 6.3V VOUT -5V 5A COUT2 150F 6.3V GND
sn3704 3704fs LT/TP 0402 2K * PRINTED IN USA

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